| CPC H03K 5/00006 (2013.01) [H03K 21/10 (2013.01); H03L 7/193 (2013.01)] | 20 Claims |

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1. A switching frequency controller comprising:
a frequency divider, configured to generate a divisional signal having a divisional frequency according to a target signal having a target frequency, wherein the target frequency is 2N times of the divisional frequency, and wherein N is a positive integer;
a frequency detector coupled to the frequency divider, the frequency detector being configured to
receive
the divisional signal generated by the frequency divider, and
a switching control signal generated by a control signal generator, and
calculate a number of periods of the switching control signal that pass by during each cycle of the divisional signal,
wherein each cycle of the divisional signal comprises an on-time and an off-time having different potentials, and
wherein the number of periods is represented by (N+1) bits;
an accumulation counter coupled to the frequency detector, the accumulation counter being configured to
set an indication value as a starting value during an initial stage, and
increase or decrease the indication value by a predetermined amount according to a most significant bit of the number of periods; and
an on-time controller coupled to the accumulation counter, the on-time controller being configured to adjust a parameter of the control signal generator according to the indication value so as to adjust an on-time length of the switching control signal;
wherein a frequency of the switching control signal is effectively controlled within a preset range close to the target frequency.
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