| CPC H03K 17/162 (2013.01) [H03K 17/063 (2013.01)] | 17 Claims |
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1. A system, comprising:
a bootstrap circuit having an input and an output, comprising:
a boost capacitor having a first terminal and a second terminal;
a first transistor coupled between the first terminal of the boost capacitor and the output of the bootstrap circuit;
a second transistor;
a third transistor, wherein the second transistor and the third transistor are coupled in series between a gate of the first transistor and the second terminal of the boost capacitor;
a switch coupled between the output of the bootstrap circuit and a ground; and
a clock path comprising one or more drivers and a delay circuit coupled in series, wherein:
a control input of the switch is coupled to a first node on the clock path located before the delay circuit, and
a gate of the third transistor is coupled to a second node on the clock path located after the delay circuit; and
a switch transistor, wherein a gate of the switch transistor is coupled to the output of the bootstrap circuit, and a terminal of the switch transistor is coupled to the input of the bootstrap circuit.
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