US 12,328,067 B2
Regulator with flipped voltage follower architecture
Chen-Hui Xu, Suzhou (CN); Xiao-Dong Fei, Suzhou (CN); Wen-Chi Huang, Hsin-Chu (TW); and Hui-Wen Hu, Suzhou (CN)
Assigned to Faraday Technology Corp., Hsin-Chu (TW)
Filed by Faraday Technology Corp., Hsin-Chu (TW)
Filed on Apr. 16, 2023, as Appl. No. 18/135,182.
Claims priority of application No. 202211483125.5 (CN), filed on Nov. 24, 2022.
Prior Publication US 2024/0178753 A1, May 30, 2024
Int. Cl. G05F 1/56 (2006.01); G05F 1/575 (2006.01); H02M 3/155 (2006.01)
CPC H02M 3/155 (2013.01) 9 Claims
OG exemplary drawing
 
1. A regulator, comprising:
a bias voltage generating circuit, configured to generate a bias voltage; and
a flipped voltage follower (FVF), configured to generate an output voltage according to the bias voltage and a supply voltage, wherein the FVF comprises:
a first P-type transistor, configured to receive the bias voltage via a gate electrode of the first P-type transistor, to generate the output voltage on a source electrode of the first P-type transistor;
a first N-type transistor, comprising a drain electrode connected to the supply voltage, a source electrode connected to the source electrode of the first P-type transistor, and a gate electrode which receives a first driving signal for compensating the output voltage; and
a second N-type transistor, comprising a drain electrode connected to the supply voltage, a source electrode connected to the source electrode of the first P-type transistor, and a gate electrode which receives a second driving signal for compensating the output voltage.