US 12,328,061 B2
Method and apparatus for suppressing cross current in inverter parallel system
Xinyu Yu, Shanghai (CN); Kai Xin, Shanghai (CN); Zhiwu Xu, Shenzhen (CN); Yanzhong Zhang, Shanghai (CN); and Junjie Li, Shanghai (CN)
Assigned to Huawei Digital Power Technologies Co., Ltd., Shenzhen (CN)
Filed by Huawei Digital Power Technologies Co., Ltd., Shenzhen (CN)
Filed on Jun. 6, 2023, as Appl. No. 18/329,896.
Application 18/329,896 is a continuation of application No. PCT/CN2020/142011, filed on Dec. 31, 2020.
Prior Publication US 2023/0318440 A1, Oct. 5, 2023
Int. Cl. H02M 1/12 (2006.01); H02M 7/493 (2007.01)
CPC H02M 1/123 (2021.05) [H02M 7/493 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for suppressing a cross current in an inverter parallel system, the method comprising:
obtaining a common-mode current and a common-mode injection voltage of each inverter in the inverter parallel system;
determining a virtual damping voltage of the each inverter based on the common-mode current and a preset common-mode damping factor of the each inverter, wherein if a direction in which a current flows out of the inverter is a positive direction, the preset common-mode damping factor is a negative value, or if a direction in which a current flows into the inverter is a positive direction, the preset common-mode damping factor is a positive value;
superimposing the virtual damping voltage on the common-mode injection voltage of the each inverter, to obtain a target common-mode voltage of the each inverter; and
controlling operation of the each inverter based on the target common-mode voltage of the each inverter and a differential mode voltage of the each inverter.