US 12,327,785 B2
High voltage passive device structure
Yuan-Yang Hsiao, Hsinchu (TW); Hsiang-Ku Shen, Hsinchu (TW); Wen-Chiung Tu, Hsinchu (TW); Tsung-Chieh Hsiao, Changhua County (TW); Chen-Chiu Huang, Hsinchu (TW); and Dian-Hau Chen, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Mar. 30, 2022, as Appl. No. 17/708,998.
Prior Publication US 2023/0317593 A1, Oct. 5, 2023
Int. Cl. H01L 23/522 (2006.01); H01L 23/532 (2006.01)
CPC H01L 23/5223 (2013.01) [H01L 23/5226 (2013.01); H01L 23/53295 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device structure, comprising:
a metal-insulator-metal (MIM) stack comprising:
at least one lower conductor plate layer,
a first insulator layer disposed over the at least one lower conductor plate layer,
a first conductor plate layer disposed over the first insulator layer,
a second insulator layer disposed over the first conductor plate layer, and
a second conductor plate layer disposed over the second insulator layer;
a ground via extending through and electrically coupled to a first ground plate in the first conductor plate layer; and
a first via extending through and electrically coupled to a high voltage plate in the second conductor plate layer,
wherein the first ground plate vertically overlaps the high voltage plate,
wherein the second insulator layer is different from the first insulator layer.