US 12,327,781 B2
Semiconductor structure and manufacturing method thereof
Ting-Yu Yeh, Hsinchu (TW); Ching-He Chen, Taoyuan (TW); Kuo-Chiang Ting, Hsinchu (TW); Weiming Chris Chen, Taipei (TW); Chia-Hao Hsu, Hsinchu (TW); Kuan-Yu Huang, Taipei (TW); and Shu-Chia Hsu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Aug. 12, 2021, as Appl. No. 17/401,265.
Prior Publication US 2023/0050785 A1, Feb. 16, 2023
Int. Cl. H01L 23/48 (2006.01); H01L 21/00 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/49816 (2013.01) [H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 21/486 (2013.01); H01L 23/49822 (2013.01); H01L 23/49833 (2013.01); H01L 23/49838 (2013.01); H01L 25/0655 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A manufacturing method of a semiconductor structure, comprising:
forming a patterned mask layer on a circuit substrate, wherein the patterned mask layer comprises a plurality of openings that are substantially uniform in size;
placing a plurality of conductive balls over the circuit substrate, wherein the plurality of conductive balls comprise varying volume, each of the plurality of conductive balls is placed in one of the plurality of openings of the patterned mask layer and disposed over a contact area of one of a plurality of contact pads that is accessibly revealed by the patterned mask layer;
reflowing the plurality of conductive balls to form a plurality of external terminals with varying heights connected to the plurality of contact pads of the circuit substrate, wherein a first external terminal of the plurality of external terminals formed in a first region of the circuit substrate and a second external terminal of the plurality of external terminals formed in a second region of the circuit substrate are non-coplanar; and
establishing an equation that expresses a relationship between critical dimensions of the plurality of external terminals and distance to neutral points, before placing the plurality of conductive balls, wherein the distance to neutral points are distances of the plurality of external terminals to a center of the circuit substrate.