| CPC H01L 21/76897 (2013.01) [H01L 21/76805 (2013.01); H01L 21/76895 (2013.01); H01L 23/5283 (2013.01); H01L 23/535 (2013.01); H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 30/797 (2025.01); H10D 62/116 (2025.01); H10D 62/151 (2025.01)] | 20 Claims |

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1. A semiconductor device structure, comprising:
a first source/drain structure;
a second source/drain structure spaced apart from the first source/drain structure;
a conductive contact electrically connected to the first source/drain structure;
a first conductive via over the conductive contact; and
a second conductive via directly above the second source/drain structure, wherein the second conductive via is longer than the first conductive via, wherein a first direct projection of the first source/drain structure on a top surface of the conductive contact and a second direct projection of the first conductive via on the top surface of the conductive contact do not overlap each other, wherein an interface between the first conductive via and the conductive contact is lower than a top of the second conductive via and higher than a bottom of the second conductive via.
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