US 12,327,748 B2
Semiconductor processing apparatus and method
Zhuo Wang, Shenyang (CN); and Saiqian Zhang, Shenyang (CN)
Assigned to Piotech Inc., Shenyang (CN)
Filed by Piotech Inc., Shenyang (CN)
Filed on Nov. 5, 2021, as Appl. No. 17/520,052.
Claims priority of application No. 202011642968.6 (CN), filed on Dec. 31, 2020.
Prior Publication US 2022/0208590 A1, Jun. 30, 2022
Int. Cl. H01L 21/683 (2006.01); H01J 37/32 (2006.01)
CPC H01L 21/6833 (2013.01) [H01J 37/32183 (2013.01); H01J 37/32568 (2013.01); H01J 37/32715 (2013.01); H01J 2237/2007 (2013.01); H01J 2237/3321 (2013.01)] 4 Claims
OG exemplary drawing
 
1. A semiconductor processing apparatus comprising:
a wafer pocket comprising a first electrode;
a direct-current power supply coupled to the first electrode;
a second electrode opposing the wafer pocket;
a radio frequency generator; and
a matching circuit that couples the second electrode and the radio frequency generator, wherein:
the matching circuit comprises:
a matching network comprising a ceramic chip capacitor; and
a low-pass filter disposed in the matching circuit,
the low-pass filter grounds the second electrode, and
the low-pass filter is outside the matching network and connected to the ceramic chip capacitor.