| CPC H01L 21/3086 (2013.01) [H01L 21/3081 (2013.01); H01L 21/31116 (2013.01); H10D 30/6212 (2025.01); H10D 84/0193 (2025.01); H10D 84/038 (2025.01); H10D 84/853 (2025.01)] | 20 Claims |
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1. A method comprising:
patterning a substrate to form a semiconductor strip protruding from a top surface of the substrate, wherein sidewalls of the semiconductor strip have a first roughness, wherein the top surface of the substrate has a third roughness;
performing an etching process on the semiconductor strip and the top surface of the substrate, wherein after performing the etching process, the sidewalls of the semiconductor strip have a second roughness that is greater than the first roughness and the top surface of the substrate has a fourth roughness that is greater than the third roughness;
forming a dummy gate stack over a channel region of the semiconductor strip;
forming gate spacers on sidewalls of the dummy gate stack; and
epitaxially growing a source/drain region adjacent the channel region.
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10. A method comprising:
depositing a mask layer over a semiconductor substrate;
patterning the mask layer to form a patterned mask;
etching the semiconductor substrate using the patterned mask to form a plurality of semiconductor fins;
performing a roughening process that roughens surfaces of the semiconductor substrate, each semiconductor fin of the plurality of semiconductor fins, and the patterned mask;
removing the patterned mask; and
forming a gate structure over the plurality of semiconductor fins, wherein the gate structure extends on the roughened surfaces of each semiconductor fin of the plurality of semiconductor fins.
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16. A method, comprising:
forming a first fin protruding from a semiconductor substrate, wherein a top surface of the first fin has a first roughness that is less than a second roughness of a sidewall of the first fin and that is less than a third roughness of a surface of the semiconductor substrate adjacent the first fin;
forming an isolation region surrounding the first fin, wherein the isolation region extends on the sidewall of the first fin and on the surface of the semiconductor substrate;
forming a gate structure extending on the top surface of the first fin and on the sidewall of the first fin; and
forming an epitaxial source/drain region in the first fin adjacent the gate structure.
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