US 12,327,719 B2
Semiconductor substrate polishing method
Shay Reboh, Grenoble (FR); Jean-Michel Hartmann, Grenoble (FR); Frederic Mazen, Grenoble (FR); and Frédéric Milesi, Grenoble (FR)
Assigned to Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Paris (FR)
Filed by Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Paris (FR)
Filed on Nov. 18, 2021, as Appl. No. 17/529,355.
Claims priority of application No. 2011912 (FR), filed on Nov. 19, 2020.
Prior Publication US 2022/0157612 A1, May 19, 2022
Int. Cl. H01L 21/02 (2006.01); H01L 21/265 (2006.01); H01L 21/306 (2006.01); H01L 21/762 (2006.01)
CPC H01L 21/0201 (2013.01) [H01L 21/02002 (2013.01); H01L 21/26586 (2013.01); H01L 21/30604 (2013.01); H01L 21/76254 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A method of polishing at least one area of a semiconductor substrate, comprising:
a) a step of multiple implantations of ions from an upper surface of the substrate, to modify the semiconductor material of an upper portion of said area of the substrate, the multiple implantations step comprising a plurality of successive implantations under different respective implantation orientations; and
b) a step of selective removal of the upper portion of the substrate,
wherein, at the end of step a), the upper portion forms a continuous layer of the modified semiconductor material extending all over the surface of said at least one area of the substrate.