US 12,327,690 B2
Ceramic electronic component and circuit board
Eriko Numata, Tokyo (JP); Daisuke Iwai, Tokyo (JP); Shinichi Sasaki, Tokyo (JP); and Fumi Mori, Tokyo (JP)
Assigned to TAIYO YUDEN CO., LTD., Tokyo (JP)
Filed by TAIYO YUDEN CO., LTD., Tokyo (JP)
Filed on Apr. 22, 2024, as Appl. No. 18/642,081.
Application 18/642,081 is a continuation of application No. 17/886,976, filed on Aug. 12, 2022, granted, now 11,996,245.
Claims priority of application No. 2021-157393 (JP), filed on Sep. 28, 2021.
Prior Publication US 2024/0274367 A1, Aug. 15, 2024
Int. Cl. H01G 4/30 (2006.01); H01G 2/06 (2006.01); H01G 4/008 (2006.01); H01G 4/012 (2006.01); H01G 4/232 (2006.01)
CPC H01G 4/30 (2013.01) [H01G 2/065 (2013.01); H01G 4/008 (2013.01); H01G 4/012 (2013.01); H01G 4/232 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A ceramic electronic component, comprising:
a ceramic body including
first and second main surfaces perpendicular to a first axis, and
first and second end surfaces perpendicular to a second axis orthogonal to the first axis;
a first external electrode that covers the first end surface and extends from the first end surface to the first and second main surfaces; and
a second external electrode that covers the second end surface and extends from the second end surface to the first and second main surfaces,
wherein
the first external electrode includes
a first surface layer portion including a Sn plating layer, and
a first inner layer portion having a structure in which a base layer adjacent to the first end face and a plating layer adjacent to the Sn plating layer are laminated and includes a first rounded inner end portion on each of the first and second main surfaces,
the second external electrode includes
a second surface layer portion including a Sn plating layer, and
a second inner layer portion having a structure in which a base layer adjacent to the second end face and a plating layer adjacent to the Sn plating layer are laminated and includes a second rounded inner end portion on each of the first and second main surfaces,
in a cross-section perpendicular to a third axis orthogonal to the first axis and the second axis at the center of the ceramic electronic component in a direction of the third axis, a ratio t2/t1 of a thickness 12 to a thickness t1 is 0.4 or more, where t2 is a thickness in a direction of the first axis of a portion in which an inclination of a tangent line of an outer surface of the first inner end portion and/or the second inner end portion with respect to each of the first and second main surfaces is 45°, and t1 is a maximum thickness in the direction of the first axis of the first inner layer portion and/or the second inner layer portion on each of the first and second main surfaces,
the thickness t2 is 3.5 μm or more, and
each of the base layer of the first external electrode and the base layer of the second external electrode is a sputtering film formed by sputtering.