US 12,327,582 B2
Memory device and operating method with mechanism to determine victim rows for refreshing
Hijung Kim, Suwon-si (KR); and Seong-Jin Cho, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Aug. 11, 2023, as Appl. No. 18/232,940.
Claims priority of application No. 10-2022-0168666 (KR), filed on Dec. 6, 2022.
Prior Publication US 2024/0185904 A1, Jun. 6, 2024
Int. Cl. G11C 11/406 (2006.01)
CPC G11C 11/406 (2013.01) [G11C 2211/4062 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a memory cell array including a plurality of rows;
an ECC engine configured to determine a health level for each of the plurality of rows based on a number of corrections of errors of data read from each of the plurality of rows;
a control logic configured to determine a victim row address based on the health level and a number of accesses for each of the plurality of rows; and
a refresh control circuit configured to perform a refresh on a row corresponding to the determined victim row address,
wherein the control logic is configured to calculate:
a number of damage occurrences of a first row, which is the sum of a number of accesses to two rows adjacent to the first row among the plurality of rows, and
a first victim degree of the first row by multiplying a health level for the first row and the number of damage occurrences of the first row, or
wherein the control logic is configured to calculate:
a weighted access count for each of the plurality of rows by multiplying the number of accesses for each of the plurality of rows by the health level for each of the plurality of rows, and
a second victim degree of a first row by adding the weighted access count of two rows adjacent to the first row among the plurality of rows.