US 12,327,183 B2
Integrated circuits for neural networks
Aleksandrs Timofejevs, Riga (LV); Boris Maslov, Newport Beach, CA (US); Nikolai Kovshov, Moscow (RU); and Dmitri Godovskiy, Moscow (RU)
Assigned to PolyN Technology Limited, Bristol (GB)
Filed by PolyN Technology Limited, London (GB)
Filed on Mar. 11, 2021, as Appl. No. 17/199,422.
Application 17/199,422 is a continuation of application No. 17/189,109, filed on Mar. 1, 2021.
Application 17/189,109 is a continuation in part of application No. PCT/EP2020/067800, filed on Jun. 25, 2020.
Application 17/189,109 is a continuation in part of application No. PCT/RU2020/000306, filed on Jun. 25, 2020.
Prior Publication US 2021/0406666 A1, Dec. 30, 2021
Int. Cl. G06N 3/065 (2023.01); G06F 1/3206 (2019.01); G06F 1/3287 (2019.01); G06F 30/39 (2020.01); G06N 3/044 (2023.01); G06N 3/049 (2023.01); G06N 3/0499 (2023.01); G06N 3/063 (2023.01); G06N 3/082 (2023.01); G06N 5/04 (2023.01)
CPC G06N 3/065 (2023.01) [G06F 1/3206 (2013.01); G06F 1/3287 (2013.01); G06F 30/39 (2020.01); G06N 3/044 (2023.01); G06N 3/049 (2013.01); G06N 3/0499 (2023.01); G06N 3/063 (2013.01); G06N 3/082 (2013.01); G06N 5/04 (2013.01)] 17 Claims
OG exemplary drawing
 
1. An integrated circuit for implementing a neural network to provide an improved signal-to-noise ratio through arrangements of analog components, comprising:
an analog network of analog components fabricated by a method comprising the steps of:
obtaining a neural network topology and weights of a trained neural network;
transforming the neural network topology to an equivalent analog network of analog components including a plurality of operational amplifiers and a plurality of resistors, wherein each operational amplifier represents a respective analog neuron, and each resistor represents a respective connection between a respective first analog neuron and a respective second analog neuron;
computing a weight matrix for the equivalent analog network based on the weights of the trained neural network, wherein each element of the weight matrix represents a respective connection;
generating a resistance matrix for the weight matrix, wherein each element of the resistance matrix corresponds to a respective weight of the weight matrix;
generating one or more lithographic masks for fabricating a circuit implementing the equivalent analog network of analog components based on the resistance matrix; and
fabricating the circuit based on the one or more lithographic masks using a lithographic process, wherein:
the trained neural network was trained using training datasets from at least one of: sensor array measurements for detecting and analyzing gas mixtures, semiconductor device aging data for predicting device lifetime, battery performance data for monitoring battery health parameters, voice data for command recognition, biometric sensor data for physiological monitoring during physical activity, or motion sensor data for human activity recognition;
the equivalent analog network is restricted to a maximum number of input and output connections per analog neuron, a predetermined signal limit, a predetermined number of layers, a predetermined range for number of analog neurons, and a predetermined range for number of connections; and
the fabricated circuit implements the trained neural network to perform real-time detection, prediction, or monitoring tasks corresponding to a respective one of the training datasets.