US 12,327,073 B2
Methods and systems for printed circuit board component placement and approval
Curtis Hunter, Kitchener (CA); and David Workman, Kitchener (CA)
Assigned to Boardera Software Inc., Kitchener (CA)
Filed by BOARDERA SOFTWARE INC., Kitchener (CA)
Filed on Dec. 28, 2023, as Appl. No. 18/399,421.
Application 18/399,421 is a continuation of application No. 17/485,634, filed on Sep. 27, 2021, granted, now 11,900,033.
Prior Publication US 2024/0126961 A1, Apr. 18, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 30/31 (2020.01); G06F 30/392 (2020.01); H05K 3/00 (2006.01); H05K 13/00 (2006.01); G06F 115/12 (2020.01)
CPC G06F 30/31 (2020.01) [G06F 30/392 (2020.01); H05K 3/0005 (2013.01); G06F 2115/12 (2020.01); H05K 13/0015 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A method for printed circuit board (PCB) component placement comprising:
receiving one or more electronic PCB design files defining a PCB design;
automatically processing the one or more electronic PCB design files to determine which PCB design features of the PCB design are electrical contact features based at least on relative positioning of conductive and mask layer features in the PCB design;
graphically displaying, on a display device, at least a portion of the PCB design including a plurality of the determined electrical contact features; and
providing a user interface control for designating at least one displayed electrical contact feature as an electrical contact for a selected electrical component,
wherein processing the one or more electronic PCB design files to determine which PCB design features are electrical contact features comprises:
converting conductive and mask draw commands in the PCB design files to combined conductive polygons and combined mask polygons, wherein the converting comprises;
converting each of the mask draw commands into individual mask polygons:
combining individual mask polygons to form the combined mask polygons;
converting into individual conductive polygons only conductive draw commands that are:
entirely contained within a corresponding opening in a combined mask polygon; or
intersecting a corresponding opening in a combined polygon; and
combining the individual conductive polygons to form combined conductive polygons; and
determining as electrical contact features only combined conductive polygons that are entirely contained within a corresponding opening in a combined mask polygon.