US 12,327,048 B2
Using duplicate data for improving error correction capability
Jeffrey S. McNeil, Nampa, ID (US); Kishore Kumar Muchherla, Fremont, CA (US); Sivagnanam Parthasarathy, Carlsbad, CA (US); Patrick R. Khayat, San Diego, CA (US); Sundararajan Sankaranarayanan, Fremont, CA (US); Jeremy Binfet, Boise, ID (US); and Akira Goda, Setagaya (JP)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Dec. 29, 2023, as Appl. No. 18/401,251.
Application 18/401,251 is a continuation of application No. 17/691,467, filed on Mar. 10, 2022, granted, now 11,861,233.
Claims priority of provisional application 63/292,830, filed on Dec. 22, 2021.
Prior Publication US 2024/0134571 A1, Apr. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01); G11C 16/26 (2006.01); G11C 16/04 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0619 (2013.01); G06F 3/0673 (2013.01); G11C 16/26 (2013.01); G11C 16/0483 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
reading a first copy of data stored in a first set of memory cells comprising a first memory cell;
determining whether a threshold voltage of the first memory cell is within a first range of threshold voltages;
responsive to determining that the threshold voltage of the first memory cell is within the first range of threshold voltages, reading a second copy of the data stored in a second set of memory cells comprising a second memory cell;
determining whether a threshold voltage of the second memory cell is within a second range of threshold voltages; and
responsive to determining that the threshold voltage of the second memory cell is outside the second range, using the second copy of the data.