US 12,327,039 B2
Method for controlling clock of controller and storage system
Kwanhyo Kim, Suwon-si (KR); and Taec-Jun Kim, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jul. 25, 2023, as Appl. No. 18/225,980.
Claims priority of application No. 10-2023-0008085 (KR), filed on Jan. 19, 2023.
Prior Publication US 2024/0248636 A1, Jul. 25, 2024
Int. Cl. G06F 1/32 (2019.01); G06F 3/06 (2006.01); G06F 1/3203 (2019.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01); G06F 1/3203 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A controller of a storage system, comprising
a plurality of modules including an intellectual property (IP) module and a core module,
wherein, based on the IP module operating as a master for a first module of the plurality of modules, an idle clock of the first module is a first clock,
wherein based on the core module operating as a master for a second module of the plurality of modules, an idle clock of the second module is a second clock,
wherein a clock frequency of the first clock is greater than zero and smaller than an active clock frequency, and
wherein a clock frequency of the second clock is zero.