US 12,327,026 B2
Memory controller, memory device, memory system and operation method thereof
Zhen Huang, Hubei (CN); Kang Li, Hubei (CN); and Zhe Zhang, Hubei (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Hubei (CN)
Filed by Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed on Dec. 30, 2022, as Appl. No. 18/148,859.
Claims priority of application No. 202211449836.0 (CN), filed on Nov. 18, 2022.
Prior Publication US 2024/0168652 A1, May 23, 2024
Int. Cl. G11C 16/10 (2006.01); G06F 3/06 (2006.01); G11C 16/34 (2006.01); G11C 16/04 (2006.01)
CPC G06F 3/0619 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G11C 16/10 (2013.01); G11C 16/3418 (2013.01); G11C 16/0483 (2013.01); G11C 16/3468 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A memory controller for use with a memory device including at least one memory cell which provides at most 2N programming levels to store N bits of data, wherein N is a positive integer, and the memory controller comprises:
interface circuitry to receive input data to be written into the at least one memory cell; and
control circuitry to:
find, in the input data, a binary code to be replaced, the binary code to be replaced corresponding to a preset programming level to be replaced;
substitute the binary code to be replaced in the input data with a replacement binary code corresponding to a preset replacement programming level, wherein the binary code to be replaced differs from the replacement binary code by one bit; and
generate a replacement identifier to link a memory address to the replacement binary code.