| CPC G06F 12/1009 (2013.01) | 20 Claims |

|
1. A computing device comprising:
a processor;
a plurality of memory devices configured to directly communicate with the processor;
a bus configured to communicate with the processor;
a storage device including a nonvolatile memory, an internal buffer memory, and a storage controller configured to control the nonvolatile memory and the internal buffer memory and to communicate with the bus; and
a memory including a buffer memory and a memory controller configured to control the buffer memory and to communicate with the bus,
wherein the nonvolatile memory of the storage device stores user data and map data,
wherein, in an initialization operation, the storage controller sends the map data to the memory through the bus based on a peer-to-peer manner without control of the processor,
wherein, in the initialization operation, the memory controller stores the map data that is transferred from the storage device through the bus, in the buffer memory,
wherein, after the initialization operation, the memory controller sends partial map data of the map data to the storage device through the bus based on the peer-to-peer manner without control of the processor, and
wherein the storage controller stores the partial map data that is transferred from the memory through the bus, in the internal buffer memory.
|