US 12,326,749 B2
Supply voltage control systems and methods for integrated circuits
Archanna Srinivasan, San Jose, CA (US); Ravi Gutala, San Jose, CA (US); Scott Weber, Piedmont, CA (US); Aravind Dasu, Milpitas, CA (US); Mahesh Iyer, Fremont, CA (US); and Eriko Nurvitadhi, Beaverton, OR (US)
Assigned to Altera Corporation, San Jose, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jun. 18, 2021, as Appl. No. 17/351,747.
Prior Publication US 2021/0311537 A1, Oct. 7, 2021
Int. Cl. G05F 1/66 (2006.01); G06F 1/28 (2006.01); H01L 25/065 (2023.01); H03K 19/00 (2006.01)
CPC G05F 1/66 (2013.01) [G06F 1/28 (2013.01); H01L 25/0655 (2013.01); H03K 19/0016 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A circuit system comprising:
a power control circuit that generates first and second voltage identifiers;
a first voltage regulator circuit that generates a first supply voltage based on the first voltage identifier, wherein the first supply voltage is provided to a first integrated circuit die, and wherein the power control circuit varies the first voltage identifier based on a change in a first metric associated with the first integrated circuit die to cause the first voltage regulator circuit to vary the first supply voltage;
a second voltage regulator circuit that generates a second supply voltage based on the second voltage identifier, wherein the second supply voltage is provided to a second integrated circuit die, wherein the power control circuit varies the second voltage identifier based on a change in a second metric associated with the second integrated circuit die to cause the second voltage regulator circuit to vary the second supply voltage, wherein the first voltage regulator circuit and the second voltage regulator circuit are fully integrated voltage regulators in a field programmable gate array; and
a circuit control system that physically organizes user logic in the field programmable gate array using timing criticality to control the fully integrated voltage regulators through soft logic for power reduction.