US 12,326,748 B2
Linear voltage regulator using serial bit stream for voltage regulation
Jaume Tornila Oliver, Eindhoven (NL); and Marco Lammers, Neerkant (NL)
Assigned to NXP B.V., Eindhoven (NL)
Filed by NXP B.V., Eindhoven (NL)
Filed on Feb. 10, 2022, as Appl. No. 17/650,569.
Prior Publication US 2023/0251679 A1, Aug. 10, 2023
Int. Cl. G05F 1/575 (2006.01); H03M 3/00 (2006.01)
CPC G05F 1/575 (2013.01) [H03M 3/30 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A linear voltage regulator comprising:
a power transistor including a first current terminal coupled to a power supply terminal and a second current terminal to supply a regulated voltage;
a converter circuit including an output to provide a serial bitstream whose pulse density is dependent upon a voltage difference between the regulated voltage and a reference voltage;
a digital to analog converter circuit that includes an input to receive the serial bitstream, the digital to analog converter circuit includes an averager circuit that produces at an output a control signal to control a voltage of a control terminal of the power transistor for regulating the regulated voltage based on the pulse density of the serial bitstream;
wherein the digital to analog converter circuit includes a level shifter that shifts the serial bitstream from a first voltage domain to a second voltage domain to provide a level shifted serial bitstream, wherein the averager circuit is implemented in the second voltage domain.