| CPC G01R 31/1263 (2013.01) [G01R 31/14 (2013.01); G01R 31/16 (2013.01)] | 4 Claims |
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1. A transformer bushing partial discharge monitoring chip device, comprising an acquisition unit, a system in package (SIP) digitization unit, and a background processing terminal, wherein the SIP digitization unit comprises a wireless communication unit and an SIP chip;
the acquisition unit comprises a plurality of sensor modules installed at end screens of three-phase bushings of a transformer respectively for acquiring partial discharge signals and power frequency current signals from the transformer bushing end screens;
each of the plurality of sensor modules in the acquisition unit is connected to the SIP digitization unit through a wire to transmit the partial discharge signals and the power frequency current signals to the SIP digitization unit for digitization;
the SIP digitization unit is installed inside the transformer, and a length of the wire is determined according to a distance between the acquisition unit and the SIP digitization unit;
the SIP digitization unit is fixedly installed beneath a base of the acquisition unit for digitizing the partial discharge signals and the power frequency current signals to obtain partial discharge information of the transformer bushings;
an output end of the SIP digitization unit is connected to an input end of the background processing terminal for transmitting the partial discharge information to the background processing terminal through the wireless communication unit for processing to enable the background processing terminal to determine a presence of partial discharge in the transformer bushings based on the partial discharge information, wherein
each of the plurality of sensor modules comprises a high frequency current sensor and a power frequency current sensor;
the high frequency current sensor is configured to acquire the partial discharge signals from the transformer bushing end screens;
the power frequency current sensor is configured to acquire the power frequency current signals from the transformer bushing end screens;
the high frequency current sensor and the power frequency current sensor are attached to a same grounding rod;
the plurality of sensor modules are tightly crimped with leads of the transformer bushing end screens via contact fingers;
the contact fingers are connected to the grounding rod for grounding the plurality of sensor modules;
bottoms of the plurality of sensor modules are supported by bases;
the SIP digitization unit is fixedly installed beneath the bases of the plurality of sensor modules;
the high frequency current sensor and the power frequency current sensor are connected respectively to the SIP digitization unit to transmit the partial discharge signals and the power frequency current signals to the SIP digitization unit for digitization, obtaining the partial discharge information of the transformer;
the SIP chip comprises one high-speed acquisition channel and four low-speed acquisition channels;
an input end of the high-speed acquisition channel is connected to the high frequency current sensor;
the high-speed acquisition channel comprises an instrumentation amplifier and a 125 MHz high-speed analog-to-digital (A/D) converter; the instrumentation amplifier is configured to amplify the partial discharge signals, and the 125 MHz high-speed A/D converter is configured to convert the partial discharge signals into partial discharge digital signals for subsequent logic calculations of the partial discharge digital signals;
the four low-speed acquisition channels comprise instrumentation amplifiers and 2 MHZ low-speed A/D converters; an input end of one of the four low-speed acquisition channels is connected to the power frequency current sensor; the instrumentation amplifier is configured to amplify the power frequency current signals, and the 125 MHz high-speed A/D converter is configured to convert the power frequency current signals into power frequency current digital signals for subsequent logic calculations of the power frequency current digital signals;
input ends of the other three of the four low-speed acquisition channels are reserved interfaces for connecting other signal acquisition devices;
the SIP chip further comprises a field programmable gate array (FPGA) programmable logic device;
the FPGA programmable logic device comprises a pre-configured arithmetic logic;
input ends of the FPGA programmable logic device are connected to the high-speed acquisition channel and the four low-speed acquisition channels to receive the partial discharge digital signals and the power frequency current digital signals; and
the partial discharge digital signals and the power frequency current digital signals are subjected to logic calculations based on the pre-configured arithmetic logic, obtaining the partial discharge information of the transformer;
the partial discharge information is transmitted to the background processing terminal through a wireless communication interface or an Ethernet interface;
the SIP chip further comprises a temperature and humidity microsensor and a vibration microsensor;
the temperature and humidity microsensor and the vibration microsensor are integrated within the SIP chip and are connected respectively to the FPGA programmable logic device for sensing a temperature, humidity and vibration frequency inside the SIP chip and transmitting the information to the FPGA programmable logic device for logic calculations to obtain temperature and humidity information and vibration frequency information within the SIP chip; the temperature and humidity information and the vibration frequency information are transmitted to the background processing terminal for monitoring a working state of the SIP chip;
the FPGA programmable logic device, the temperature and humidity microsensor, and the vibration microsensor are integrated on an upper layer of the SIP chip;
the high-speed acquisition channel and the four low-speed acquisition channels are integrated on a lower layer of the SIP chip;
the upper layer and the lower layer of the SIP chip are isolated by a low temperature co-fired ceramic (LTCC) substrate to avoid mutual interference between analog signals and digital signals; and
devices on the upper layer of the SIP chip and devices on the lower layer of the SIP chip are connected to the LTCC substrate in a flip-chip packaging mode to reduce a lead inductance and enhance a heat dissipation capability of the SIP chip.
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