US 12,325,627 B2
Configurable microphone using internal clock changing
Dietmar Straeussnigg, Villach (AT); and Daniel Neumaier, Feldkirchen (AT)
Assigned to Infineon Technologies AG, Neubiberg (DE)
Filed by Infineon Technologies AG, Neubiberg (DE)
Filed on Jan. 27, 2020, as Appl. No. 16/773,079.
Prior Publication US 2021/0229980 A1, Jul. 29, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. B81B 7/00 (2006.01); H03M 3/00 (2006.01); H04R 19/04 (2006.01)
CPC B81B 7/008 (2013.01) [H03M 3/47 (2013.01); H03M 3/496 (2013.01); H04R 19/04 (2013.01); H04R 2201/003 (2013.01)] 20 Claims
OG exemplary drawing
 
18. A microelectromechanical (MEMS) circuit in a single package comprising:
a control signal input, a clock signal input, and a data stream output for providing a constant rate single bit output stream at one or more output nodes;
a MEMS device; and
a signal processing circuit coupled to the MEMS device, to the control signal input, to the clock signal input, and the data stream output, wherein the signal processing circuit is configured to:
in a first operational mode, convert an analog output of the MEMS device into a first internal data stream having a first sampling rate derived from a clock frequency of an undivided clock signal and a first external data stream having the first sampling rate;
transition from the first operational mode to a second operational mode without restarting the MEMS; and
in the second operational mode, convert the analog output of the MEMS device into a second internal data stream having a second sampling rate different from the first sampling rate, and perform a sampling rate conversion of the second internal data stream to generate a second external data stream having the first sampling rate, wherein the second sampling rate is derived from a clock frequency of a divided clock signal.