| CPC H10B 12/36 (2023.02) [H10B 12/056 (2023.02); H10B 12/50 (2023.02)] | 20 Claims |
|
1. A transistor comprising:
a source region located in a substrate;
a drain region located in the substrate;
one or more fin structures between the source region and the drain region, the one or more fin structures recessed from a top level of the source region and from a top level of the drain region, each fin structure of the one or more fin structures having a tip region; and
a gate recessed from the top level of the source region and the top level of the drain region, the gate separated from the tip region of the one or more fin structures by a gate dielectric defining a channel between the source region and the drain region.
|