CPC H04W 72/12 (2013.01) [H04W 72/1268 (2013.01); H04W 72/1273 (2013.01)] | 20 Claims |
1. A circuit, comprising:
a host interface; and
a single media access control (MAC) controller implemented on a processor, the single MAC controller interfacing with each of a first transmit and receive circuitry and a second transmit and receive circuitry,
the first transmit and receive circuitry that transmits and receives data over a first operating frequency band,
the second transmit and receive circuitry that transmits and receives the data over a second operating frequency band different from the first operating frequency band; and
the single MAC controller including a multi-band manager, the multi-band manager directing a first portion of a plurality of data frames received from the host interface to the first transmit and receive circuitry and a second portion of the plurality of data frames to the second transmit and receive circuitry.
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