US 12,004,127 B2
Communication device, system and method for communication using feedback
Baris Göktepe, Berlin (DE); Thomas Fehrenbach, Berlin (DE); Cornelius Hellge, Berlin (DE); Thomas Schierl, Berlin (DE); and Robin Thomas, Berlin (DE)
Assigned to Koninklijke Philips N.V., Eindhoven (NL)
Filed by KONINKLIJKE PHILIPS N.V., Eindhoven (NL)
Filed on Mar. 23, 2023, as Appl. No. 18/125,159.
Application 18/125,159 is a continuation of application No. 16/739,867, filed on Jan. 10, 2020, granted, now 11,627,557.
Application 16/739,867 is a continuation of application No. PCT/EP2018/068935, filed on Jul. 12, 2018.
Claims priority of application No. 17181315 (EP), filed on Jul. 13, 2017; and application No. 17186157 (EP), filed on Aug. 14, 2017.
Prior Publication US 2023/0232376 A1, Jul. 20, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H04W 72/044 (2023.01); H04L 1/1812 (2023.01); H04L 5/00 (2006.01); H04W 4/06 (2009.01); H04W 72/04 (2023.01); H04L 12/18 (2006.01)
CPC H04W 72/04 (2013.01) [H04L 1/1812 (2013.01); H04L 5/0053 (2013.01); H04W 4/06 (2013.01); H04W 72/0466 (2013.01); H04L 12/189 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A device comprising:
a processor circuit; and
a memory circuit, wherein the memory circuit is arranged to store instructions for the processor circuit,
wherein the processor circuit is arranged to receive at least one first information from a plurality of second devices,
wherein the processor circuit is arranged to receive a resource allocation message from a managing device,
wherein the resource allocation message defines an allocation of bit positions,
wherein the bit positions are associated with an acknowledgement of the at least one first information,
wherein the processor circuit is arranged to transmit an acknowledgement information in response to a reception of the at least one first information from the plurality of second devices.