CPC H04N 1/00034 (2013.01) [H04N 1/00076 (2013.01); H04N 1/6033 (2013.01); H04N 1/00058 (2013.01); H04N 1/107 (2013.01)] | 14 Claims |
1. An information processing apparatus comprising:
at least one memory device that stores a set of instructions; and
at least one processor that executes the set of instructions to:
generate a first chart including a first reference patch and a second reference patch;
generate a first read result patch and a second read result patch based on a read result obtained by reading the first reference patch and the second reference patch; and
generate a second chart including the first reference patch and the second reference patch, and the first read result patch and the second read result patch,
wherein, in the first chart, the first reference patch and the second reference patch are arranged adjacent to each other, and
wherein, in the second chart, the first read result patch is arranged adjacent to the first reference patch, the second read result patch is arranged adjacent to the second reference patch, and the first reference patch and the second reference patch are arranged adjacent to each other.
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