CPC H04L 1/1819 (2013.01) [H04L 5/0055 (2013.01); H04L 5/0092 (2013.01); H04W 8/24 (2013.01)] | 19 Claims |
1. A transmitter comprising:
a processor; and
a memory, wherein the memory stores instructions that, when executed by the processor, cause the processor to:
transmit to a receiver, an initial transmission of a hybrid automatic repeat request (HARQ) process;
receive from the receiver, receiver decoding capability information and feedback indicative of decoding success by the receiver, wherein the receiver decoding capability information includes decoding throughput of the receiver;
set a retransmission duration based on the decoding throughput of the receiver; and
implement a retransmission of the HARQ process based on the retransmission duration.
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