CPC H03K 3/012 (2013.01) [H03K 3/02332 (2013.01); H03K 3/0372 (2013.01); H03K 3/289 (2013.01); H03K 3/356104 (2013.01); H03K 3/3562 (2013.01); H03K 3/35625 (2013.01)] | 20 Claims |
1. A method to operate a flip-flop circuit, comprising:
receiving a scan-in signal and a data signal;
selectively coupling either the scan-in signal or the data signal to coupled master and slave latches; and
based on a clock signal, selectively activating either the master latch or the slave latch so as to latch either the scan-in signal or the data signal as an output signal of the flip-flop circuit, wherein the master latch circuit comprises a pair of cross-coupled AND-OR-Inverter (AOI) logic gates, and the slave latch circuit comprises a pair of cross-coupled OR-AND-Inverter (OAI) logic gates;
providing a logically inverted clock signal to the master latch circuit and the slave latch circuit, respectively; and
delaying the clock signal to the master latch circuit but not delaying the clock signal to the slave latch circuit.
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