US 12,003,194 B2
Multilevel power converter circuit
Marco Esteban Rivera Abarca, Maule (CL); Mohammad Ali Hosseinzadeh, Curicó (CL); and Maryam Sarbanzadeh, Curicó (CL)
Assigned to UNIVERSIDAD DE TALCA, Talca (CL)
Appl. No. 17/610,133
Filed by UNIVERSIDAD DE TALCA, Talca (CL)
PCT Filed May 9, 2019, PCT No. PCT/CL2019/050038
§ 371(c)(1), (2) Date Nov. 9, 2021,
PCT Pub. No. WO2020/223830, PCT Pub. Date Nov. 12, 2020.
Prior Publication US 2022/0224245 A1, Jul. 14, 2022
Int. Cl. H02M 7/537 (2006.01); H02M 7/483 (2007.01)
CPC H02M 7/537 (2013.01) [H02M 7/483 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A multilevel power converter circuit characterized in that the multilevel power converter circuit comprises a circuit configuration shown in FIG. 10,
where V1, V2, V3, V4, V5 are sources of DC voltage;
where S1, S1, S2, S2, S3, T1, T1, T2, T2 are semiconductor switches; and
where D1 and D2 are two semiconductor diodes.