US 12,003,171 B2
Output overvoltage protection for a totem pole power factor correction circuit
Armando Gabriel Mesa, Tempe, AZ (US); and Ajay Karthik Hari, Scottsdale, AZ (US)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Apr. 14, 2022, as Appl. No. 17/659,250.
Claims priority of provisional application 63/180,506, filed on Apr. 27, 2021.
Prior Publication US 2022/0345033 A1, Oct. 27, 2022
Int. Cl. H02M 1/32 (2007.01); H02M 1/42 (2007.01); H02M 1/44 (2007.01)
CPC H02M 1/4225 (2013.01) [H02M 1/32 (2013.01); H02M 1/44 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A method for controlling a power factor correction (PFC) circuit, the method comprising:
detecting that an input voltage is in a first half cycle having a first polarity;
applying a PWM signal to a first transistor of a fast-leg portion of the PFC circuit for a conversion process corresponding to the first half cycle;
detecting that the input voltage is at a first polarity change;
pausing the PWM signal; and
applying a pulse sequence to a second transistor of the fast-leg portion of the PFC circuit to change a voltage on an EMI capacitor from a first voltage corresponding to the first half cycle to a second voltage corresponding to a second half cycle having a second polarity opposite the first polarity.