US 12,002,846 B2
Integrated circuits having dielectric layers including an anti-reflective coating
Poornika Fernandes, Murphy, TX (US); David Matthew Curran, Plano, TX (US); Stephen Arlon Meisner, Allen, TX (US); Bhaskar Srinivasan, Allen, TX (US); Guruvayurappan S. Mathur, Plano, TX (US); Scott William Jessen, Allen, TX (US); Shih Chang Chang, Allen, TX (US); Russell Duane Fields, Richardson, TX (US); and Thomas Terrance Lynch, Allen, TX (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Oct. 13, 2021, as Appl. No. 17/500,096.
Application 17/500,096 is a continuation of application No. 16/584,463, filed on Sep. 26, 2019, granted, now 11,171,200.
Prior Publication US 2022/0069067 A1, Mar. 3, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/02 (2006.01); H01L 49/02 (2006.01)
CPC H01L 28/60 (2013.01) [H01L 21/0214 (2013.01); H01L 21/02164 (2013.01); H01L 21/0217 (2013.01); H01L 21/02274 (2013.01)] 16 Claims
OG exemplary drawing
 
1. An integrated circuit, comprising:
a substrate;
a metal layer positioned above the substrate;
a composite dielectric layer located on the metal layer, wherein the composite dielectric layer comprises an anti-reflective coating between first and second silicon oxide layers and has a first perimeter;
a capacitor dielectric located on the second silicon oxide layer of the composite dielectric layer and having a different second perimeter; and
a capacitor metal layer disposed on the capacitor dielectric.