CPC H01L 23/5283 (2013.01) [H01L 21/76807 (2013.01); H01L 21/7684 (2013.01); H01L 21/76843 (2013.01); H01L 21/76883 (2013.01); H01L 21/76888 (2013.01); H01L 23/5226 (2013.01); H01L 23/53238 (2013.01); H01L 25/18 (2013.01)] | 20 Claims |
1. A method comprising:
receiving a substrate having a metal structure directly below a dielectric layer;
forming an opening in the dielectric layer to expose the metal structure
providing a gas that induces metal material from the metal structure to migrate into the opening; and
chemical mechanical polishing that planarizes an upper surface of the metal material within the opening, wherein the chemical mechanical polishing exposes a top electrode of a memory cell.
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