US 12,002,682 B2
Tip-to-tip graphic preparation method
Yanli Li, Shanghai (CN); Yushu Yang, Shanghai (CN); and Qiang Wu, Shanghai (CN)
Assigned to SHANGHAI IC R&D CENTER CO., LTD, Shanghai (CN)
Appl. No. 17/783,641
Filed by SHANGHAI IC R&D CENTER CO., LTD, Shanghai (CN)
PCT Filed Jul. 23, 2020, PCT No. PCT/CN2020/103760
§ 371(c)(1), (2) Date Jun. 8, 2022,
PCT Pub. No. WO2021/135179, PCT Pub. Date Jul. 8, 2021.
Claims priority of application No. 201911398950.3 (CN), filed on Dec. 30, 2019.
Prior Publication US 2023/0005751 A1, Jan. 5, 2023
Int. Cl. H01L 21/308 (2006.01); H01L 21/033 (2006.01); H01L 21/311 (2006.01); H01L 21/3213 (2006.01); H01L 21/768 (2006.01)
CPC H01L 21/3086 (2013.01) [H01L 21/0332 (2013.01); H01L 21/0337 (2013.01); H01L 21/0338 (2013.01); H01L 21/3081 (2013.01); H01L 21/3088 (2013.01); H01L 21/31144 (2013.01); H01L 21/32139 (2013.01); H01L 21/76816 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A Tip-to-Tip pattern preparation method, comprising:
step S1: providing a substrate, and sequentially forming a layer to be etched, a first hard mask layer, a second hard mask layer, a sacrificial layer, a first dielectric layer and a first photoresist layer on the substrate, performing EUV lithography on the first photoresist layer to form a first patterned photoresist layer, which has a first Tip-to-Tip pattern;
step S2: using the first patterned photoresist layer as a mask, sequentially etching the first dielectric layer and the sacrificial layer to the upper surface of the second hard mask layer, thus forming a patterned sacrificial layer which has the first Tip-to-Tip pattern;
step S3: forming a spacer layer on the sidewall of the patterned sacrificial layer to fill Tip-to-Tip spaces of the first Tip-to-Tip pattern and expose a part of the upper surface of the second hard mask layer in other area;
step S4: forming a patterned protective layer to mask areas exposed by the patterned sacrificial layer and the spacer layer and expose the upper surface of the patterned sacrificial layer, using the patterned protective layer as a mask to remove the patterned sacrificial layer and the second hard mask layer thereunder, thus exposing a part of the upper surface of the first hard mask layer;
step S5: removing the patterned protective layer and sequentially forming a second dielectric layer and a second photoresist layer above the first hard mask layer, the second hard mask layer, and the spacer layer, and performing the EUV lithography on the second photoresist layer to form a second patterned photoresist layer, which has a second Tip-to-Tip pattern, the second Tip-to-Tip pattern and the first Tip-to-Tip pattern are interlaced;
step S6: using the second patterned photoresist layer as a mask, sequentially etching the second dielectric layer, the spacer layer and the second hard mask layer to the upper surface of the first hard mask layer, thus transferring the second Tip-to-Tip pattern into the spacer layer and the second hard mask layer;
step S7: removing the second patterned photoresist layer and the second dielectric layer, using the spacer layer and the second hard mask layer as a mask and etching the first hard mask layer and the layer to be etched to the upper surface of the substrate, thus forming a Tip-to-Tip pattern composed of the first Tip-to-Tip pattern interlaced with the second Tip-to-Tip pattern in the layer to be etched.