US 12,002,404 B2
Scan driver and display device having the same
Kang Nam Kim, Yongin-si (KR); Sung Hoon Lim, Yongin-si (KR); Woo Geun Lee, Yongin-si (KR); Kyu Sik Cho, Yongin-si (KR); and Jae Beom Choi, Yongin-si (KR)
Assigned to Samsung Display Co., Ltd., Yongin-si (KR)
Filed by Samsung Display Co., Ltd., Yongin-si (KR)
Filed on Apr. 10, 2023, as Appl. No. 18/132,704.
Application 18/132,704 is a continuation of application No. 17/478,825, filed on Sep. 17, 2021, granted, now 11,626,060.
Application 17/478,825 is a continuation of application No. 16/875,682, filed on May 15, 2020, granted, now 11,127,339, issued on Sep. 21, 2021.
Claims priority of application No. 10-2019-0060734 (KR), filed on May 23, 2019.
Prior Publication US 2023/0245612 A1, Aug. 3, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G09G 3/20 (2006.01); G09G 3/3266 (2016.01); G09G 3/3233 (2016.01)
CPC G09G 3/2092 (2013.01) [G09G 3/3233 (2013.01); G09G 3/3266 (2013.01); G09G 2310/0202 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0275 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A scan driver comprising:
a plurality of stages, each of which is configured to control a voltage of a first node in response to a first signal of a previous stage and to output a second signal in response to the voltage of the first node,
wherein an nth stage, where n is a natural number, from among the plurality of stages comprises:
a first transistor coupled between a first terminal configured to receive the first signal and a second node, the first transistor comprising a gate electrode coupled to a second terminal;
a capacitor coupled between the second node and a third terminal;
a second transistor coupled between the third terminal and a third node, the second transistor comprising a gate electrode coupled to the second node; and
a third transistor coupled between the third node and the first node, the third transistor comprising a gate electrode coupled to a fourth terminal.