CPC G06N 3/006 (2013.01) [G06F 1/3287 (2013.01); G06N 5/04 (2013.01); G06N 20/00 (2019.01)] | 23 Claims |
1. A method implemented in one or more systems, each including a processor having a core comprising a first portion of circuitry including a plurality of cores and a second portion of circuitry external to the core, the method comprising:
while executing software on a first processor in a first system to perform a first workload,
training a first machine learning (ML) model by adjusting a frequency of the core of the first processor to obtain a first trained ML model; and
implementing the trained ML model in an inference mode while training a second ML model by adjusting a frequency of the core and a frequency of the second portion of circuitry of the first processor to obtain a second trained ML model.
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