CPC G06F 9/3869 (2013.01) [G06F 9/223 (2013.01); G06F 9/30141 (2013.01); G06F 9/4825 (2013.01)] | 23 Claims |
1. A processor comprising:
a time counter storing a time count representing a current time of the processor, wherein the time count is incremented periodically;
an instruction issue unit coupled to the time counter for receiving a first fused instruction comprising a first operation that corresponds to a first instruction and a second operation that corresponds to a second instruction, wherein result data of the first operation are forwarded to the second operation without being stored in an intervening register, and issuing the first fused instruction with a preset execution time based on the time count; and
an execution queue coupled to the time counter and the instruction issue unit to receive the first fused instruction from the instruction issue unit, and dispatch the first operation to a first functional unit when the preset execution time of the first operation corresponds to the time count and dispatch the second operation to a second functional unit when the preset execution time of the second operation corresponds to the time count, and wherein the result data from the first functional unit is forwarded to the second functional unit.
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