US 12,001,771 B2
Variant model-based compilation for analog simulation
Peter Foelsche, Austin, TX (US)
Assigned to Siemens Industry Software Inc., Plano, TX (US)
Filed by Siemens Industry Software Inc., Plano, TX (US)
Filed on Aug. 26, 2021, as Appl. No. 17/412,404.
Prior Publication US 2023/0069588 A1, Mar. 2, 2023
Int. Cl. G06F 30/30 (2020.01); G06F 30/323 (2020.01); G06F 30/367 (2020.01)
CPC G06F 30/367 (2020.01) [G06F 30/323 (2020.01)] 17 Claims
OG exemplary drawing
 
1. A method comprising:
identifying, by a computing system, multiple analog design blocks in a circuit design describing an electronic device, wherein the analog design blocks include different sets of parameters;
generating, by the computing system, equivalent networks for the analog design blocks using the different sets of the parameters, which includes, for each of the analog design blocks, selectively collapsing nodes and branches in the analog design blocks based on values of the corresponding sets of the parameters;
selectively compiling, by the computing system, a subset of the analog design blocks into multiple compiled variant models based, at least in part, on a comparison of the equivalent networks; and
simulating, by the computing system implementing an analog simulator, the analog design blocks in the circuit design using the compiled variant models.