CPC G06F 3/0619 (2013.01) [G06F 3/064 (2013.01); G06F 3/0653 (2013.01); G06F 3/0679 (2013.01); G06F 11/1068 (2013.01)] | 16 Claims |
1. A memory system comprising:
a nonvolatile memory including a plurality of blocks each including a plurality of cell units, each of the cell units including a plurality of memory cells; and
a memory controller,
wherein the memory controller is configured to
read second data from a second cell unit in a first block in response to first data being written in a first cell unit in the first block, and
reserve refresh processing for the first block when the second data satisfies a condition.
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