US 12,001,674 B2
Reusing memory arrays for physically unclonable function (PUF) generation
Nihaar N. Mahatme, Austin, TX (US); and Anirban Roy, Austin, TX (US)
Assigned to NXP USA, Inc., Austin, TX (US)
Filed by NXP USA, Inc., Austin, TX (US)
Filed on Oct. 28, 2022, as Appl. No. 18/050,547.
Prior Publication US 2024/0143167 A1, May 2, 2024
Int. Cl. G06F 3/00 (2006.01); G06F 3/06 (2006.01); G06F 9/4401 (2018.01); G11C 11/412 (2006.01); G11C 11/419 (2006.01)
CPC G06F 3/0604 (2013.01) [G06F 3/0632 (2013.01); G06F 3/0679 (2013.01); G06F 9/4401 (2013.01); G11C 11/4125 (2013.01); G11C 11/419 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
an array of bit cells programmed with user data, wherein existence of a transistor in a bit cell indicates a first logic state of a corresponding stored bit of the user data and lack of the transistor in the bit cell indicates a second logic state of the corresponding stored bit of the user data, wherein the array of bit cells is arranged in rows and columns, wherein each row comprises a corresponding word line and each column comprises a corresponding column line;
a plurality of differential PUF bits in the array, each differential PUF bit including a first bit cell of the array of bit cells programmed with user data and a second bit cell of the array of bit cells programmed with user data;
a first set of sense-amplifiers coupled to the column lines of the array and configured to output from the array a set of data bits of the user data stored at a selected word line and selected column lines;
a second set of sense-amplifiers coupled to the column lines of the array and configured to output a set of differential output bits, each differential output bit based on a differential current between two columns lines of the selected column lines corresponding to the first and second bit cells of a corresponding differential PUF bit along the selected word line; and
a potential PUF bit generator configured to output a set of potential PUF bits from the array based on the set of data bits of the user data from the first set of sense-amplifiers and the set of differential output bits from the second set of sense-amplifiers.