CPC G06F 3/0395 (2013.01) [G06F 3/03543 (2013.01); G06F 3/038 (2013.01); H02J 7/00712 (2020.01); H02J 7/345 (2013.01); H02J 50/10 (2016.02); H02J 2207/20 (2020.01)] | 15 Claims |
1. A computer mouse comprising:
a housing configured to receive a removable first charge storage device;
an interface configured to wirelessly receive power from an external power source;
a second charge storage device; and
a multiplexor (MUX) including:
an output coupled to one or more processors; and
a set of inputs coupled to the first charge storage device, the interface, and the second charge storage device,
wherein the MUX is configured to electrically couple the interface to the one or more processors based on a determination that the external power source is electrically coupled to and providing power to the interface,
wherein the MUX is configured to electrically couple the second charge storage device to the one or more processors based on a determination that the external power source is electrically coupled to the interface but is not currently providing power to the interface, and
wherein the MUX is configured to electrically couple the first charge storage device to the one or more processors based on a determination that the first charge storage device is electrically coupled to the MUX and the external power source is not coupled to or not providing power to the interface,
wherein the second charge storage device is configured to be charged by the external power source via a charging circuit having a current limiter comprising:
a first low-dropout voltage (LDO) regulator circuit that is biased in a floating output configuration;
a second LDO regulator circuit configured to regulate its output voltage to a level that is within a normal operational range of the second charge storage device,
wherein the first LDO regulates its output voltage across an output resistor thereby generating a constant current that passes through the second LDO and charges the second charge storage device until the second LDO reaches and regulates at a predetermined voltage, thereby causing the first LDO to stop regulating until the output of the second LDO drops below the predetermined voltage.
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