CPC G06F 13/4027 (2013.01) [G06F 13/1668 (2013.01)] | 20 Claims |
1. A multi-die integrated circuit, comprising:
an interposer;
a die coupled to the interposer, wherein the die includes a first data processing engine (DPE) array and a second DPE array;
wherein the first DPE array includes a first plurality of DPEs and a first DPE interface coupled to the first plurality of DPEs;
wherein the second DPE array includes a second plurality of DPEs and a second DPE interface coupled to the second plurality of DPEs; and
one or more other dies having a first die interface coupled to, and configured to communicate with, the first DPE interface via the interposer and a second die interface coupled to, and configured to communicate with, the second DPE interface via the interposer.
|