CPC G06F 13/18 (2013.01) [G06F 13/1668 (2013.01); G06F 13/4282 (2013.01)] | 20 Claims |
1. A device comprising:
a processor;
a memory array comprising a plurality of memory devices, wherein the plurality of memory devices is grouped into a plurality of zones;
a plurality of communication channels configured to connect to a plurality of hosts, wherein:
each zone of the plurality of zones is configured to communicate with a single host; and
the plurality of communication channels comprises both high-priority communication channels and low-priority communication channels; and
a priority assignment logic, executed by the processor, configured to:
in response to a determination that data transmitted from a host of the plurality of hosts comprises indication signal indicative of a high-priority communication requirement, assign a high-priority communication channel to the host; and
provide a use of the high-priority communication channel to the host;
establish a time window-based analysis with respect to host data stream write patterns;
scan for one or more available zones within the storage device; and
determine an amount of storage device usage commands issued per zone.
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