| CPC G06F 13/1689 (2013.01) [G11C 17/143 (2013.01); G11C 17/18 (2013.01)] | 21 Claims |
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1. A method, comprising:
receiving, via a shared command bus, a command at each memory device of a plurality of memory devices, wherein each of the memory devices comprises:
at least one delay element configured to alter a timing of a decoded command relative to other of a plurality of command paths corresponding to the plurality of memory devices,
wherein each of the memory devices comprises a different at least one delay element,
at least one memory array, and
at least one decoder;
decoding the command at each of the memory devices utilizing at least one decoder associated with each of the memory devices to generate the decoded command for each of the memory devices;
receiving the decoded command at delay elements of each of the memory devices,
wherein the delay elements of each of the memory devices receives a different instance of the decoded command,
wherein the delay elements are implemented as part of the at least one decoder associated with each of the memory devices, and
wherein each of the delay elements are programmed with different timing delays utilizing a different array of fuses of each of the memory devices; and
receiving the decoded command at the memory arrays of each of the memory devices through respective command paths of each of the memory devices configured to have the different timing delays relative to the memory devices utilizing the respective delay elements of each of the memory devices, and
wherein the different timing delays are provided by a programming module external to the memory devices based on settings read from the different arrays of fuses.
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