CPC G06F 13/1652 (2013.01) [G06F 13/4022 (2013.01); G06F 13/4269 (2013.01)] | 20 Claims |
1. An apparatus comprising:
a first protocol stack circuit comprising a first transaction layer and a first link layer;
a second protocol stack circuit comprising a second transaction layer and a second link layer;
an arbiter/multiplexer (ARB/MUX) coupled to the first protocol stack circuit and the second protocol stack circuit, the ARB/MUX to multiplex first information of the first protocol stack circuit and second information of the second protocol stack circuit, wherein the ARB/MUX comprises:
a first virtual link state machine (vLSM) for the first link layer, the first vLSM associated with and to virtualize a link state of the first link layer; and
a second vLSM for the second link layer, the second vLSM associated with and to virtualize a link state of the second link layer;
wherein the first vLSM is to:
send a first status synchronization message, the first status synchronization message to identify a link state of the first vLSM; and
receive a second status synchronization message, the second status synchronization message to identify a link state of a third vLSM, wherein based at least in part on the link state of the first vLSM and the link state of the third vLSM, the ARB/MUX is to determine a resolved vLSM state.
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