US 12,001,353 B2
System, apparatus and method for synchronizing multiple virtual link states over a package interconnect
Joon Teik Hor, Bayan Lepas (MY); Ting Lok Song, Bayan Lepas (MY); Mahesh Wagh, Portland, OR (US); and Su Wei Lim, Bayan Lepas (MY)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Aug. 12, 2022, as Appl. No. 17/819,390.
Application 17/819,390 is a continuation of application No. 16/426,361, filed on May 30, 2019, granted, now 11,442,876.
Prior Publication US 2023/0026906 A1, Jan. 26, 2023
Int. Cl. G06F 13/16 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01)
CPC G06F 13/1652 (2013.01) [G06F 13/4022 (2013.01); G06F 13/4269 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a first protocol stack circuit comprising a first transaction layer and a first link layer;
a second protocol stack circuit comprising a second transaction layer and a second link layer;
an arbiter/multiplexer (ARB/MUX) coupled to the first protocol stack circuit and the second protocol stack circuit, the ARB/MUX to multiplex first information of the first protocol stack circuit and second information of the second protocol stack circuit, wherein the ARB/MUX comprises:
a first virtual link state machine (vLSM) for the first link layer, the first vLSM associated with and to virtualize a link state of the first link layer; and
a second vLSM for the second link layer, the second vLSM associated with and to virtualize a link state of the second link layer;
wherein the first vLSM is to:
send a first status synchronization message, the first status synchronization message to identify a link state of the first vLSM; and
receive a second status synchronization message, the second status synchronization message to identify a link state of a third vLSM, wherein based at least in part on the link state of the first vLSM and the link state of the third vLSM, the ARB/MUX is to determine a resolved vLSM state.