CPC G06F 12/1063 (2013.01) [G06F 12/1009 (2013.01); G06F 12/1027 (2013.01); G06T 1/20 (2013.01); G06T 1/60 (2013.01); G06F 2212/455 (2013.01); G06F 2212/65 (2013.01); G06F 2212/657 (2013.01); G06F 2212/68 (2013.01)] | 20 Claims |
1. An apparatus comprising:
a memory device configured to store a page table that includes a set of page table entries;
a graphics processing cluster array including a plurality of graphics multiprocessors, the plurality of graphics multiprocessors coupled via a data interconnect, a graphics multiprocessor of the plurality of graphics multiprocessors including:
a translation lookaside buffer (TLB) coupled with the memory device, the TLB to cache a first page table entry of the set of page table entries, the first page table entry to indicate that a first virtual page is a valid page that is cleared to a clear color; and
circuitry to bypass an access to the memory device for the first virtual page and determine a color associated with the first virtual page based on the indication that the first virtual page is a valid page that is cleared to the clear color.
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