US 12,001,319 B2
Device debugging connection control and maintenance
Wen-Bin Gao, Shanghai (CN); Lingli Wu, Shanghai (CN); and Ning Xia, Shanghai (CN)
Assigned to Micro Focus LLC, Santa Clara, CA (US)
Appl. No. 17/621,981
Filed by MICRO FOCUS LLC, Santa Clara, CA (US)
PCT Filed Jul. 10, 2019, PCT No. PCT/CN2019/095398
§ 371(c)(1), (2) Date Dec. 22, 2021,
PCT Pub. No. WO2021/003694, PCT Pub. Date Jan. 14, 2021.
Prior Publication US 2022/0261335 A1, Aug. 18, 2022
Int. Cl. G06F 11/00 (2006.01); G06F 11/36 (2006.01); H04W 12/06 (2021.01)
CPC G06F 11/3664 (2013.01) [G06F 11/3656 (2013.01); H04W 12/06 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a processor; and
a memory storing machine readable instructions that when executed by the processor cause the processor to:
receive, from a debug tool, a connection request to connect to a device to be debugged;
implement, based on the connection request, a primary socket connection via a Universal Serial Bus (USB) channel to the device;
implement, based on the connection request, a backup socket connection via a Wi-Fi channel to the device;
control, based on the implementation of the primary socket connection and the backup socket connection, maintenance of a debugging session during performance of a debugging operation; and
when a disconnection of one of the primary socket or the backup socket occurs, replace the other of the primary socket or the backup socket such that the debugging session continues to operate without interruption.