US 12,324,332 B2
Display panel and display device
Tiaomei Zhang, Beijing (CN); Juntao Chen, Beijing (CN); Ziyang Yu, Beijing (CN); Zhiliang Jiang, Beijing (CN); and Ming Hu, Beijing (CN)
Assigned to CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Filed on Dec. 27, 2023, as Appl. No. 18/398,064.
Application 18/398,064 is a continuation of application No. 18/257,303, previously published as PCT/CN2022/096377, filed on May 31, 2022.
Prior Publication US 2024/0423037 A1, Dec. 19, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G09G 5/00 (2006.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01); H10D 86/40 (2025.01); H10D 86/60 (2025.01)
CPC H10K 59/131 (2023.02) [H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10D 86/441 (2025.01); H10D 86/60 (2025.01)] 19 Claims
OG exemplary drawing
 
1. A display panel, wherein the display panel comprises a display area, a light emitting unit located in the display area, and a pixel driving circuit for driving the light emitting unit, the pixel driving circuit is connected to a first electrode of the light emitting unit, and the display panel further comprises:
a base substrate;
a first power line, disposed in the display area of the display panel, wherein an orthographic projection of the first power line on the base substrate is extended along a first direction;
a second power line, disposed in the display area of the display panel, wherein an orthographic projection of the second power line on the base substrate is extended along a second direction, the second direction intersects the first direction, and at least a part of the second power line is connected to at least a part of the first power line through a via hole; and
a common electrode layer disposed at a side of the base substrate, wherein the common electrode layer is used to form a second electrode of the light emitting unit, and the common electrode layer is connected to the first power line and the second power line,
wherein the pixel driving circuit comprises a driving transistor, and the display panel further comprises:
a fourth conductive layer, disposed between the base substrate and the common electrode layer, wherein the fourth conductive layer comprises a fourth bridging part, and the fourth bridging part is connected to a gate electrode of the driving transistor through a via hole;
at least part of the first power line is located at the fourth conductive layer.