US 12,324,331 B2
Display panel and display device
Xing Zhang, Beijing (CN); Pan Xu, Beijing (CN); Dacheng Zhang, Beijing (CN); Ying Han, Beijing (CN); Guoying Wang, Beijing (CN); Zhan Gao, Beijing (CN); Chengyuan Luo, Beijing (CN); and Yi Chen, Beijing (CN)
Assigned to BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/790,623
Filed by BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Aug. 23, 2021, PCT No. PCT/CN2021/114049
§ 371(c)(1), (2) Date Jul. 1, 2022,
PCT Pub. No. WO2023/023892, PCT Pub. Date Mar. 2, 2023.
Prior Publication US 2024/0206249 A1, Jun. 20, 2024
Int. Cl. H10K 59/131 (2023.01); H01L 21/77 (2017.01); H10K 59/124 (2023.01)
CPC H10K 59/131 (2023.02) 20 Claims
OG exemplary drawing
 
1. A display panel, comprising:
a base substrate, comprising a display region and a peripheral region adjacent to the display region;
a first power trace, disposed in the peripheral region and on a side of the base substrate, wherein the first power trace is extended along a first direction and configured to receive a first power signal;
a connecting trace, disposed in the peripheral region and on a side of the base substrate, wherein the connecting trace is electrically connected to the first power trace and extended along a second direction, the second direction intersecting the first direction;
a plurality of signal lines, disposed in the display region and the peripheral region, wherein orthographic projections of parts, disposed in the peripheral region, of the plurality of signal lines on the base substrate enclose a plurality of target regions arranged along the second direction, and an orthographic projection of the connecting trace on the base substrate is at least partially overlapped with the plurality of target regions;
an insulating layer, disposed in the display region and the peripheral region, wherein the insulating layer is disposed on a side, distal from the base substrate, of the connecting trace, and the insulating layer is provided with a plurality of first via holes arranged along the second direction; the plurality of first via holes being in one-to-one correspondence with the plurality of target regions, and an orthographic projection of the first via hole on the base substrate being within one corresponding target region; and
a cathode layer, disposed in the display region and the peripheral region, wherein the cathode layer is disposed on a side, distal from the base substrate, of the insulating layer, and the cathode layer is electrically connected to the connecting trace through the plurality of first via holes.