US 12,324,319 B2
Organic light emitting display device and a method of manufacturing organic light emitting display device
Jeongho Lee, Seoul (KR); Yanghee Kim, Yongin-si (KR); Juncheol Shin, Asan-si (KR); Hokyoon Kwon, Seoul (KR); Deukjong Kim, Cheonan-si (KR); and Keunsoo Lee, Cheonan-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed by SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed on Jan. 24, 2022, as Appl. No. 17/648,728.
Application 17/648,728 is a continuation of application No. 16/877,048, filed on May 18, 2020, granted, now 11,251,412.
Application 16/877,048 is a continuation of application No. 15/952,885, filed on Apr. 13, 2018, granted, now 10,658,628, issued on May 19, 2020.
Claims priority of application No. 10-2017-0065883 (KR), filed on May 29, 2017.
Prior Publication US 2022/0149131 A1, May 12, 2022
Int. Cl. H10K 59/124 (2023.01); H10K 50/844 (2023.01); H10K 59/12 (2023.01); H10K 59/131 (2023.01); H10K 71/00 (2023.01); H10K 77/10 (2023.01); H10K 102/00 (2023.01)
CPC H10K 59/124 (2023.02) [H10K 50/844 (2023.02); H10K 59/131 (2023.02); H10K 71/00 (2023.02); H10K 77/111 (2023.02); H10K 59/1201 (2023.02); H10K 59/1315 (2023.02); H10K 2102/00 (2023.02); H10K 2102/311 (2023.02)] 17 Claims
OG exemplary drawing
 
1. An organic light emitting display (OLED) device, comprising:
a substrate comprising a display region including a pixel region and a peripheral region, a pad region, and a bending region that is positioned between the display region and the pad region, the substrate including a groove in the bending region;
a buffer layer on the substrate, the buffer layer including a step portion in a portion that is located adjacent to the groove;
pixel structures in the pixel region on the buffer layer;
a semiconductor element positioned between the buffer layer and the pixel structure, wherein the semiconductor element includes:
an active layer; and
a first gate electrode:
an insulation layer structure on the buffer layer, the insulation layer structure having a side surface on the buffer layer so that the insulation layer structure is not overlapped with the step portion of the buffer layer;
a fan-out wiring in the peripheral region and the pad region, which are located adjacent to the bending region, on the insulation layer structure;
a first planarization layer on the insulation layer structure in the bending region; and
a connection electrode in the bending region on the first planarization layer and contacting the fan-out wiring in the peripheral region and the pad region,
wherein the first planarization layer extends between the connection electrode and the step portion of the buffer layer,
wherein the fan-out wiring exposes the groove of the substrate and the step portion of the buffer layer, and wherein the connection electrode is in direct contact with the fan-out wiring.