US 12,324,301 B2
Contaminated interface mitigation in a semiconductor device
Tung Huei Ke, Leuven (BE); David Cheyns, Heffen (BE); and Pawel Malinowski, Heverlee (BE)
Assigned to IMEC VZW, Leuven (BE)
Filed by Imec vzw, Leuven (BE)
Filed on Oct. 15, 2021, as Appl. No. 17/502,708.
Claims priority of application No. 20204665 (EP), filed on Oct. 29, 2020.
Prior Publication US 2022/0140276 A1, May 5, 2022
Int. Cl. H10K 50/15 (2023.01); G03F 7/20 (2006.01); H10K 50/16 (2023.01); H10K 50/81 (2023.01); H10K 50/82 (2023.01); H10K 71/00 (2023.01); H10K 85/60 (2023.01)
CPC H10K 50/156 (2023.02) [H10K 50/16 (2023.02); H10K 50/81 (2023.02); H10K 50/82 (2023.02); H10K 71/00 (2023.02); G03F 7/2022 (2013.01); H10K 85/615 (2023.02); H10K 85/624 (2023.02); H10K 85/626 (2023.02); H10K 85/633 (2023.02); H10K 85/6572 (2023.02)] 8 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate;
a first hole-transporting layer over the substrate;
a first electron-transporting layer directly on the first hole-transporting layer; and
a second hole-transporting layer over the first electron-transporting layer,
wherein at least one of the first electron-transporting layer and the second hole-transporting layer has an organic component,
wherein:
a metal oxide layer is directly on the first electron-transporting layer, a second electron-transporting layer is directly on the metal oxide layer, and the second hole-transporting layer is on the second electron-transporting layer.